mirror of
https://github.com/pentoo/pentoo-overlay
synced 2026-02-04 06:24:50 +01:00
240 lines
8 KiB
Diff
240 lines
8 KiB
Diff
--- ./drivers/net/wireless/ath/ath.h
|
|
+++ ./drivers/net/wireless/ath/ath.h
|
|
@@ -119,6 +119,7 @@ struct ath_ops {
|
|
void (*write_flush) (void *);
|
|
u32 (*rmw)(void *, u32 reg_offset, u32 set, u32 clr);
|
|
};
|
|
+typedef struct ath_ops __no_const ath_ops_no_const;
|
|
|
|
struct ath_common;
|
|
struct ath_bus_ops;
|
|
--- ./drivers/net/wireless/ath/ath9k/ar9002_mac.c
|
|
+++ ./drivers/net/wireless/ath/ath9k/ar9002_mac.c
|
|
@@ -184,8 +184,8 @@ ar9002_set_txdesc(struct ath_hw *ah, voi
|
|
ads->ds_txstatus6 = ads->ds_txstatus7 = 0;
|
|
ads->ds_txstatus8 = ads->ds_txstatus9 = 0;
|
|
|
|
- ACCESS_ONCE(ads->ds_link) = i->link;
|
|
- ACCESS_ONCE(ads->ds_data) = i->buf_addr[0];
|
|
+ ACCESS_ONCE_RW(ads->ds_link) = i->link;
|
|
+ ACCESS_ONCE_RW(ads->ds_data) = i->buf_addr[0];
|
|
|
|
ctl1 = i->buf_len[0] | (i->is_last ? 0 : AR_TxMore);
|
|
ctl6 = SM(i->keytype, AR_EncrType);
|
|
@@ -199,26 +199,26 @@ ar9002_set_txdesc(struct ath_hw *ah, voi
|
|
|
|
if ((i->is_first || i->is_last) &&
|
|
i->aggr != AGGR_BUF_MIDDLE && i->aggr != AGGR_BUF_LAST) {
|
|
- ACCESS_ONCE(ads->ds_ctl2) = set11nTries(i->rates, 0)
|
|
+ ACCESS_ONCE_RW(ads->ds_ctl2) = set11nTries(i->rates, 0)
|
|
| set11nTries(i->rates, 1)
|
|
| set11nTries(i->rates, 2)
|
|
| set11nTries(i->rates, 3)
|
|
| (i->dur_update ? AR_DurUpdateEna : 0)
|
|
| SM(0, AR_BurstDur);
|
|
|
|
- ACCESS_ONCE(ads->ds_ctl3) = set11nRate(i->rates, 0)
|
|
+ ACCESS_ONCE_RW(ads->ds_ctl3) = set11nRate(i->rates, 0)
|
|
| set11nRate(i->rates, 1)
|
|
| set11nRate(i->rates, 2)
|
|
| set11nRate(i->rates, 3);
|
|
} else {
|
|
- ACCESS_ONCE(ads->ds_ctl2) = 0;
|
|
- ACCESS_ONCE(ads->ds_ctl3) = 0;
|
|
+ ACCESS_ONCE_RW(ads->ds_ctl2) = 0;
|
|
+ ACCESS_ONCE_RW(ads->ds_ctl3) = 0;
|
|
}
|
|
|
|
if (!i->is_first) {
|
|
- ACCESS_ONCE(ads->ds_ctl0) = 0;
|
|
- ACCESS_ONCE(ads->ds_ctl1) = ctl1;
|
|
- ACCESS_ONCE(ads->ds_ctl6) = ctl6;
|
|
+ ACCESS_ONCE_RW(ads->ds_ctl0) = 0;
|
|
+ ACCESS_ONCE_RW(ads->ds_ctl1) = ctl1;
|
|
+ ACCESS_ONCE_RW(ads->ds_ctl6) = ctl6;
|
|
return;
|
|
}
|
|
|
|
@@ -243,7 +243,7 @@ ar9002_set_txdesc(struct ath_hw *ah, voi
|
|
break;
|
|
}
|
|
|
|
- ACCESS_ONCE(ads->ds_ctl0) = (i->pkt_len & AR_FrameLen)
|
|
+ ACCESS_ONCE_RW(ads->ds_ctl0) = (i->pkt_len & AR_FrameLen)
|
|
| (i->flags & ATH9K_TXDESC_VMF ? AR_VirtMoreFrag : 0)
|
|
| SM(i->txpower, AR_XmitPower)
|
|
| (i->flags & ATH9K_TXDESC_VEOL ? AR_VEOL : 0)
|
|
@@ -253,19 +253,19 @@ ar9002_set_txdesc(struct ath_hw *ah, voi
|
|
| (i->flags & ATH9K_TXDESC_RTSENA ? AR_RTSEnable :
|
|
(i->flags & ATH9K_TXDESC_CTSENA ? AR_CTSEnable : 0));
|
|
|
|
- ACCESS_ONCE(ads->ds_ctl1) = ctl1;
|
|
- ACCESS_ONCE(ads->ds_ctl6) = ctl6;
|
|
+ ACCESS_ONCE_RW(ads->ds_ctl1) = ctl1;
|
|
+ ACCESS_ONCE_RW(ads->ds_ctl6) = ctl6;
|
|
|
|
if (i->aggr == AGGR_BUF_MIDDLE || i->aggr == AGGR_BUF_LAST)
|
|
return;
|
|
|
|
- ACCESS_ONCE(ads->ds_ctl4) = set11nPktDurRTSCTS(i->rates, 0)
|
|
+ ACCESS_ONCE_RW(ads->ds_ctl4) = set11nPktDurRTSCTS(i->rates, 0)
|
|
| set11nPktDurRTSCTS(i->rates, 1);
|
|
|
|
- ACCESS_ONCE(ads->ds_ctl5) = set11nPktDurRTSCTS(i->rates, 2)
|
|
+ ACCESS_ONCE_RW(ads->ds_ctl5) = set11nPktDurRTSCTS(i->rates, 2)
|
|
| set11nPktDurRTSCTS(i->rates, 3);
|
|
|
|
- ACCESS_ONCE(ads->ds_ctl7) = set11nRateFlags(i->rates, 0)
|
|
+ ACCESS_ONCE_RW(ads->ds_ctl7) = set11nRateFlags(i->rates, 0)
|
|
| set11nRateFlags(i->rates, 1)
|
|
| set11nRateFlags(i->rates, 2)
|
|
| set11nRateFlags(i->rates, 3)
|
|
--- ./drivers/net/wireless/ath/ath9k/ar9003_mac.c
|
|
+++ ./drivers/net/wireless/ath/ath9k/ar9003_mac.c
|
|
@@ -39,47 +39,47 @@ ar9003_set_txdesc(struct ath_hw *ah, voi
|
|
(i->qcu << AR_TxQcuNum_S) | desc_len;
|
|
|
|
checksum += val;
|
|
- ACCESS_ONCE(ads->info) = val;
|
|
+ ACCESS_ONCE_RW(ads->info) = val;
|
|
|
|
checksum += i->link;
|
|
- ACCESS_ONCE(ads->link) = i->link;
|
|
+ ACCESS_ONCE_RW(ads->link) = i->link;
|
|
|
|
checksum += i->buf_addr[0];
|
|
- ACCESS_ONCE(ads->data0) = i->buf_addr[0];
|
|
+ ACCESS_ONCE_RW(ads->data0) = i->buf_addr[0];
|
|
checksum += i->buf_addr[1];
|
|
- ACCESS_ONCE(ads->data1) = i->buf_addr[1];
|
|
+ ACCESS_ONCE_RW(ads->data1) = i->buf_addr[1];
|
|
checksum += i->buf_addr[2];
|
|
- ACCESS_ONCE(ads->data2) = i->buf_addr[2];
|
|
+ ACCESS_ONCE_RW(ads->data2) = i->buf_addr[2];
|
|
checksum += i->buf_addr[3];
|
|
- ACCESS_ONCE(ads->data3) = i->buf_addr[3];
|
|
+ ACCESS_ONCE_RW(ads->data3) = i->buf_addr[3];
|
|
|
|
checksum += (val = (i->buf_len[0] << AR_BufLen_S) & AR_BufLen);
|
|
- ACCESS_ONCE(ads->ctl3) = val;
|
|
+ ACCESS_ONCE_RW(ads->ctl3) = val;
|
|
checksum += (val = (i->buf_len[1] << AR_BufLen_S) & AR_BufLen);
|
|
- ACCESS_ONCE(ads->ctl5) = val;
|
|
+ ACCESS_ONCE_RW(ads->ctl5) = val;
|
|
checksum += (val = (i->buf_len[2] << AR_BufLen_S) & AR_BufLen);
|
|
- ACCESS_ONCE(ads->ctl7) = val;
|
|
+ ACCESS_ONCE_RW(ads->ctl7) = val;
|
|
checksum += (val = (i->buf_len[3] << AR_BufLen_S) & AR_BufLen);
|
|
- ACCESS_ONCE(ads->ctl9) = val;
|
|
+ ACCESS_ONCE_RW(ads->ctl9) = val;
|
|
|
|
checksum = (u16) (((checksum & 0xffff) + (checksum >> 16)) & 0xffff);
|
|
- ACCESS_ONCE(ads->ctl10) = checksum;
|
|
+ ACCESS_ONCE_RW(ads->ctl10) = checksum;
|
|
|
|
if (i->is_first || i->is_last) {
|
|
- ACCESS_ONCE(ads->ctl13) = set11nTries(i->rates, 0)
|
|
+ ACCESS_ONCE_RW(ads->ctl13) = set11nTries(i->rates, 0)
|
|
| set11nTries(i->rates, 1)
|
|
| set11nTries(i->rates, 2)
|
|
| set11nTries(i->rates, 3)
|
|
| (i->dur_update ? AR_DurUpdateEna : 0)
|
|
| SM(0, AR_BurstDur);
|
|
|
|
- ACCESS_ONCE(ads->ctl14) = set11nRate(i->rates, 0)
|
|
+ ACCESS_ONCE_RW(ads->ctl14) = set11nRate(i->rates, 0)
|
|
| set11nRate(i->rates, 1)
|
|
| set11nRate(i->rates, 2)
|
|
| set11nRate(i->rates, 3);
|
|
} else {
|
|
- ACCESS_ONCE(ads->ctl13) = 0;
|
|
- ACCESS_ONCE(ads->ctl14) = 0;
|
|
+ ACCESS_ONCE_RW(ads->ctl13) = 0;
|
|
+ ACCESS_ONCE_RW(ads->ctl14) = 0;
|
|
}
|
|
|
|
ads->ctl20 = 0;
|
|
@@ -89,17 +89,17 @@ ar9003_set_txdesc(struct ath_hw *ah, voi
|
|
|
|
ctl17 = SM(i->keytype, AR_EncrType);
|
|
if (!i->is_first) {
|
|
- ACCESS_ONCE(ads->ctl11) = 0;
|
|
- ACCESS_ONCE(ads->ctl12) = i->is_last ? 0 : AR_TxMore;
|
|
- ACCESS_ONCE(ads->ctl15) = 0;
|
|
- ACCESS_ONCE(ads->ctl16) = 0;
|
|
- ACCESS_ONCE(ads->ctl17) = ctl17;
|
|
- ACCESS_ONCE(ads->ctl18) = 0;
|
|
- ACCESS_ONCE(ads->ctl19) = 0;
|
|
+ ACCESS_ONCE_RW(ads->ctl11) = 0;
|
|
+ ACCESS_ONCE_RW(ads->ctl12) = i->is_last ? 0 : AR_TxMore;
|
|
+ ACCESS_ONCE_RW(ads->ctl15) = 0;
|
|
+ ACCESS_ONCE_RW(ads->ctl16) = 0;
|
|
+ ACCESS_ONCE_RW(ads->ctl17) = ctl17;
|
|
+ ACCESS_ONCE_RW(ads->ctl18) = 0;
|
|
+ ACCESS_ONCE_RW(ads->ctl19) = 0;
|
|
return;
|
|
}
|
|
|
|
- ACCESS_ONCE(ads->ctl11) = (i->pkt_len & AR_FrameLen)
|
|
+ ACCESS_ONCE_RW(ads->ctl11) = (i->pkt_len & AR_FrameLen)
|
|
| (i->flags & ATH9K_TXDESC_VMF ? AR_VirtMoreFrag : 0)
|
|
| SM(i->txpower, AR_XmitPower)
|
|
| (i->flags & ATH9K_TXDESC_VEOL ? AR_VEOL : 0)
|
|
@@ -135,22 +135,22 @@ ar9003_set_txdesc(struct ath_hw *ah, voi
|
|
val = (i->flags & ATH9K_TXDESC_PAPRD) >> ATH9K_TXDESC_PAPRD_S;
|
|
ctl12 |= SM(val, AR_PAPRDChainMask);
|
|
|
|
- ACCESS_ONCE(ads->ctl12) = ctl12;
|
|
- ACCESS_ONCE(ads->ctl17) = ctl17;
|
|
+ ACCESS_ONCE_RW(ads->ctl12) = ctl12;
|
|
+ ACCESS_ONCE_RW(ads->ctl17) = ctl17;
|
|
|
|
- ACCESS_ONCE(ads->ctl15) = set11nPktDurRTSCTS(i->rates, 0)
|
|
+ ACCESS_ONCE_RW(ads->ctl15) = set11nPktDurRTSCTS(i->rates, 0)
|
|
| set11nPktDurRTSCTS(i->rates, 1);
|
|
|
|
- ACCESS_ONCE(ads->ctl16) = set11nPktDurRTSCTS(i->rates, 2)
|
|
+ ACCESS_ONCE_RW(ads->ctl16) = set11nPktDurRTSCTS(i->rates, 2)
|
|
| set11nPktDurRTSCTS(i->rates, 3);
|
|
|
|
- ACCESS_ONCE(ads->ctl18) = set11nRateFlags(i->rates, 0)
|
|
+ ACCESS_ONCE_RW(ads->ctl18) = set11nRateFlags(i->rates, 0)
|
|
| set11nRateFlags(i->rates, 1)
|
|
| set11nRateFlags(i->rates, 2)
|
|
| set11nRateFlags(i->rates, 3)
|
|
| SM(i->rtscts_rate, AR_RTSCTSRate);
|
|
|
|
- ACCESS_ONCE(ads->ctl19) = AR_Not_Sounding;
|
|
+ ACCESS_ONCE_RW(ads->ctl19) = AR_Not_Sounding;
|
|
}
|
|
|
|
static u16 ar9003_calc_ptr_chksum(struct ar9003_txc *ads)
|
|
--- ./drivers/net/wireless/ath/ath9k/hw.h
|
|
+++ ./drivers/net/wireless/ath/ath9k/hw.h
|
|
@@ -657,7 +657,7 @@ struct ath_hw_private_ops {
|
|
|
|
/* ANI */
|
|
void (*ani_cache_ini_regs)(struct ath_hw *ah);
|
|
-};
|
|
+} __no_const;
|
|
|
|
/**
|
|
* struct ath_hw_ops - callbacks used by hardware code and driver code
|
|
@@ -687,7 +687,7 @@ struct ath_hw_ops {
|
|
void (*antdiv_comb_conf_set)(struct ath_hw *ah,
|
|
struct ath_hw_antcomb_conf *antconf);
|
|
void (*antctrl_shared_chain_lnadiv)(struct ath_hw *hw, bool enable);
|
|
-};
|
|
+} __no_const;
|
|
|
|
struct ath_nf_limits {
|
|
s16 max;
|
|
@@ -707,7 +707,7 @@ enum ath_cal_list {
|
|
#define AH_FASTCC 0x4
|
|
|
|
struct ath_hw {
|
|
- struct ath_ops reg_ops;
|
|
+ ath_ops_no_const reg_ops;
|
|
|
|
struct ieee80211_hw *hw;
|
|
struct ath_common common;
|